1. Technical Field
The present invention relates to a fabrication of a semiconductor device, and more particularly, to a method of fabricating a storage capacitor of a semiconductor memory device, and a structure thereof.
2. Description
In general, a semiconductor memory device, e.g., a DRAM, has a tendency of a rapid reduction in an area of a unit cell, according to an increase in density. A sufficient capacity of the capacitor constituting a memory cell is required so as not to impair an operating characteristic of the memory device. For example, a high-density device over 64 Mb typically uses a capacitor structure of a cylinder type. In comparison with a fin or trench structure, etc., as a conventional technique, such a cylinder type capacitor structure has a relatively large electrostatic capacity and also has an advantage in the aspect of leakage current.
A widely known method of fabricating the capacitor having the cylinder structure, in general, includes the procedure of fabricating a storage capacitor as a lower electrode by using, as a mask, photoresist as a photosensitive film and an oxide film spacer.
FIGS. 1 to 4 are sectional views showing a fabrication of a cylinder type storage capacitor according to such a technique. The sectional structures shown in FIGS. 2 to 4 are progressed in sequence, to thus result in the device shown in FIG. 1.
Referring first to FIG. 2, a transistor constructed of a device isolation film 4, a gate electrode 6, a spacer 8 and source/drain 10 is formed through a general fabrication process on a semiconductor substrate 2. Then, a bit line 14 connected to the transistor is formed through a contact plug 12. Herewith, the gate electrode 6 and the bit line 14 are electrically isolated through a dielectric film, e.g., a tetra-ethyl-ortho-silicate (TEOS) film, and the bit line 14 is coupled with the source/drain region 10a of the transistor through the contact plug 12. Thereon, a dielectric film 16, e.g., O3-TEOS film is deposited entirely, and on an upper part thereof, a silicon nitride 18 is deposited. Subsequently, photoresist is placed on an upper part of the silicon nitride layer 18 and then a photolithography process is executed to thus form a photoresist pattern 20 for exposing the source/drain region 10b of the transistor. Through a use of this pattern as an etch mask, the silicon nitride 18 and the dielectric film 16 are anisotropically etched in sequence, to thus form a contact hole for exposing the source/drain region 10b of the transistor, as shown in FIG. 2.
With reference to FIG. 3, the photoresist pattern 20 shown in FIG. 2 is removed, and then a storage electrode conductive film that will be formed as a storage capacitor, e.g., a polysilicon film 22 doped with impurities is deposited with a predetermined thickness. Then, on an upper part of this polysilicon film 22, a photoresist pattern 24 for defining a region where a storage capacitor electrode will be formed, is formed. Thereon, a low-temperature oxide film is entirely deposited and then is etched-back, to thus form a spacer 26 in a side wall of the photoresist pattern 24. Through a use of the spacer 26 as the etch mask, the polysilicon film 22 is anisotropically etched by constant thickness, to produce the structure shown in FIG. 3.
Referring to FIG. 4, the photoresist pattern 24 is removed, and then the polysilicon film 22 is etched by using the spacer 26 as the etch mask, to thus form a storage capacitor electrode 22a of a cylinder type. Next, the spacer 26 is eliminated, and a dielectric film 28 is formed on an overall upper surface of the storage capacitor electrode of the cylinder type. Subsequently, a polysilicon film doped with impurities is entirely deposited, and is patterned, to thus form a plate capacitor electrode 30 on an upper part of the dielectric film 28, thus completing the structure, as shown in FIG. 1.
The method of fabricating such a conventional cylinder type capacitor has a limitation to largely use the electrostatic capacity of the storage capacitor that becomes a lower electrode.
That is to say, a tendency to higher density devices causes many restrictions in obtaining a larger sectional area between a storage capacitor electrode and a plate electrode. Especially, if a height of a contact plug for connecting the storage capacitor electrode with a source or drain region of the transistor is high, an electrostatic capacity can be reduced due to an increase of contact resistance.
Therefore, an object of the present invention is to provide a method of fabricating a storage capacitor in a semiconductor memory device and a storage capacitor structure, to address the conventional problems.
Another object of the present invention is to provide a method of fabricating a storage capacitor in a semiconductor memory device and a storage capacitor structure to be advantageously applied to a high-density device.
Still another object of the present invention is to provide a method of fabricating a storage capacitor in a semiconductor memory device and a storage capacitor structure so as to obtain a larger electrostatic capacity within a restricted area.
In accordance with one aspect of the present invention to achieve these objects, the method of fabricating a storage capacitor of a semiconductor memory device comprises the steps of: depositing a first dielectric film and a second dielectric film on a substrate in an area where a memory cell transistor has been formed, and forming a defined first photoresist pattern on an upper part of the second dielectric film; anisotropically etching the second and first dielectric films by using the first photoresist pattern as an etch mask, to form a first contact hole for exposing an activation region of the transistor; removing the first photoresist pattern, wet-etching the substrate with an etching solution having a difference in an etch ratio between the first and second dielectric films to form a second contact hole having a negative slope; depositing a conductive film to form within the second contact hole a contact plug of the storage capacitor having a void therein; performing an etchback to open an upper part of the void of the contact plug; covering a structure produced by the preceding steps with a third dielectric film, and then forming a second photoresist pattern for defining a region where a storage capacitor electrode is to be formed; dry-etching the third dielectric film exposed through the second photoresist pattern; and removing the second photoresist pattern, and covering a surface of the device with material to form the storage capacitor electrode, to obtain the storage capacitor electrode having a double cylindrical structure.
Herein, the first dielectric film is an oxide film, and the second dielectric film may be a nitride film, and the etching solution preferably is hydrofluoric acid (HF). The conductive film that will become the contact plug can be a doped polysilicon film.
To fabricate a plurality of memory cells, preferably, included are the steps of covering the surface with an oxide film after producing the storage capacitor electrode, and performing an etchback and a wet etching, to thus obtain the storage capacitor electrode divided into a unit of memory cell.
In accordance with another aspect of the present invention, the storage capacitor of a semiconductor memory device has a structure of a double cylinder that is extended by a constant depth from an upper part of a contact plug to a lower part thereof.
In accordance with yet another aspect of the invention, A capacitor for a semiconductor device comprises: a cylindrical contact plug disposed within a first dielectric film formed on a substrate, the cylindrical contact plug having a first inner diameter and a first outer diameter; a cylindrical lower electrode structure disposed on the cylindrical contact plug, the cylindrical lower electrode structure having a second inner diameter and a second outer diameter, where the second inner diameter is greater than the first inner diameter and the second outer diameter is greater than the first outer diameter; a second dielectric film covering an interior surface of the cylindrical contact plug and both interior and exterior surfaces the cylindrical lower electrode structure; and an upper electrode formed on the second dielectric film.